Chip Scale Photonics
Chip-scale photonics (also called integrated photonics or photonic integrated circuits, PICs) is the integration of lasers, waveguides, modulators, filters, switches, and detectors onto a single semiconductor chip—typically millimeter-scale—rather than assembling bulky discrete optics on a bench or board.
It is the photonic analog of electronic ICs: photons replace electrons as the information carriers. The goal is to shrink size, weight, power, and cost (SWaP-C) while raising bandwidth and stability.
How it works (technical picture):
Light is confined in high-index-contrast waveguides (often silicon or silicon nitride on insulator). A typical chip includes:
Passive routing: waveguides, directional couplers, multimode interference (MMI) splitters, arrayed waveguide gratings (AWGs), ring resonators.
Active devices: modulators (plasma-dispersion silicon rings or Mach–Zehnder interferometers; lithium niobate for higher electro-optic efficiency), photodetectors (usually germanium-on-silicon), and lasers.
I/O: grating couplers or edge couplers that interface the chip to optical fiber.
The laser problem. Silicon has an indirect bandgap and is a poor light emitter, so on-chip lasers are the hardest piece.
Common solutions:
Hybrid integration: a III–V (InP or GaAs) gain chip is bonded or edge-coupled to a silicon or SiN photonic circuit.
Heterogeneous integration: III–V material is wafer-bonded and processed together with silicon.
Self-injection locking: a multimode or Fabry–Pérot laser is locked to a high-Q on-chip resonator (often SiN) to produce a narrow-linewidth, single-frequency output in a tiny footprint.
Emerging routes: quantum-dot lasers, epitaxial III–V on silicon, and photonic-crystal (LEAP) lasers with very low threshold current.
Platforms in use today include silicon-on-insulator (SOI) for dense CMOS-compatible circuits, silicon nitride for ultra-low-loss waveguides and visible/near-IR work, InP for native lasers and amplifiers, and thin-film lithium niobate for high-speed modulators. Hybrid stacks combine the strengths of several materials.
Fabrication increasingly uses CMOS foundries (300 mm wafers), which is why the technology can scale in volume and cost the way electronics did.
Applications:
Datacenter and AI interconnects: high-bandwidth, low-energy optical links (pluggable transceivers today; co-packaged optics and optical I/O for GPUs/ASICs next). Wavelength-division multiplexing on a chip is a core use case.
LiDAR and 3D sensing: compact, steerable sources and receivers for automotive and industrial ranging.
Communications and microwave photonics: coherent transceivers, frequency combs, beam combining, and RF-photonic signal processing.
Sensing and spectroscopy: evanescent-field biosensors, on-chip spectrometers, and environmental or medical diagnostics.
Quantum photonics: chip-scale generation of single photons, entangled pairs, and squeezed light, plus routing and interferometry for quantum computing and communications.
Photonic computing: analog matrix multiplies and neuromorphic processors that use light for linear algebra at high speed and low energy.
The field is moving from a few components per chip (early silicon photonics transceivers) toward large-scale integration with hundreds to thousands of elements, plus 2.5D/3D stacking of photonics with electronics.
Remaining practical challenges are on-chip laser power and efficiency, fiber-to-chip coupling loss, thermal control, and high-yield packaging.